Check out the new SLCFET developed by Northrop Grumman, specifically to provide low-loss switching.
Check out chalcogenide switches, for the same reason as SLCFET
Click here to go to our main page on microwave switches
Click here to go to our main page on FETs
Click here to go to our page comparing FET and PIN diode switches
Click here to go to an example of how to use Keysight's ADS to model two-state devices
Click here to learn about resonating FET off-capacitance with a parallel inductor
How is a switch FET different from an amplifier FET? First of all, it is not biased into the active region, so it can't amplify or oscillate. Second, there is a lot more freedom in the geometry of a switch FET which we will describe here.
Meandered-gate switch FETs
How is a switch FET different from an amplifier FET? Actually, they can be of the same structure. The thing to remember is that the drain-source DC voltage of a switch FET is zero, so it is not active in the sense that it could amplify a signal. Also, amplifier FETs are invariably grounded at the source (OK, it is possible to create a common-gate amp, but it is very unusual). Switch FETs may not be RF grounded at all, in the case of a series switch FET. In the case of a shunt switch FET, the source is at RF ground, while the drain terminal serves as both the RF input and RF and output.
SPDT switch examples
The photos below show two MMIC SPDT switches (X-band) that employ meandered-gate switch FETs. Nice designs no doubt but we'd like to see RF probe pads (ground-signal or ground-signal-ground) on the RF I/Os. One of these days we'll conjure up some schematics for these two devices.
The first device is a shunt-shunt switch that uses four FETs. This type of switch requires a quarter-wave transmission line between the common terminal and the first shunt FET in each switch arm. This is because the shunt FET acts like a short circuit when an arm is turned off, so the load it presents to the common arm must me rotated around the Smith chart to an open circuit. See our page on quarterwave tricks. Shunt FET switches offer higher power handling than switches with series FETs, because you don't pass power (and RF current) through a FET in the ON state.
Before we move on, let's point out something that the designer off these switches got wrong, concerning isolation. Here's an important consideration for designing with shunt switch elements that you need to know about!
Let's also point out something that he got right. The switch arms are pointed opposite each other (east and west), this is the best layout to maximize isolation. Never put these paths parallel to each other! Also, note the stripe of gold near the bottom center of the switch, near the row-column number 34-18. This covers a picket fence of two or three ground vias, which helps stop unwanted coupling between the switch arms. Every little trick must be employed to maximize isolation!
The second switch design uses series-shunt-shunt FET switch arms. In spite of the additional two FETs, the design could actually be smaller than the previous one because quarterwave lines are not required at the common port. This design offers superior bandwidth, if not for the blocking caps at all RF ports it could work down to DC.
The requirements for a switch FET are quite different than that of an amplifier FET. Since we aren't trying to get any gain out of the device, we don't care what the gate terminal resistance is. In an amplifier, increased gate resistance would result in lower gain (thanks for the correction, Dongping!), in a switch FET increased gate resistance helps isolate the control terminal from the RF signal. Further, instead of trying to match the gate terminal to the system characteristic impedance, the control signal lines connected to the switch FET gate terminal use the highest practical impedance and other tricks to prevent RF energy from finding its way down this path. Other tricks for isolating the gate terminals of the FETs include lumped element filtering, and series resistance.
Another thing you'll note on these switches and most MMICs is that all the gate fingers are oriented the same direction (in this case east-west). There are two reasons for this. First, the gate recess etches differently depending on which way it cuts across the crystal. Second, the e-beam machine that formed these gates only likes to be tweaked up for sub-micron alignment in one dimension.
In order to isolate the drain and the source as much as possible to achieve the lowest possible Coff, we want a switch FET structure that minimizes parasitic capacitance between the source and drain terminals. Because high gate terminal resistance is also desirable as discussed previously, the meandered-gate FET is the preferred geometry of a microwave switch FET. An example is shown in the Bookham Technology switch shown below. Such a structure eliminates the need for source-overlay airbridges, and their contribution to Coff. Contrary the belief held in some circles, the meandered gate does not reduce the upper frequency limit of the switch FET. Even when it is multiple wavelengths long, the gate finger doesn't introduce any distributed property that merits consideration in the design. Its function is to carry DC voltage, not RF.
Photo courtesy of Bookham Technology
Resonant structures for overcoming FET capacitance
The off-capacitance starts to eat into the performance of a switch FET at higher frequencies, long before you leave X-band. A trick employed by switch designers is to "resonate out" the capacitance of the FET to create an open circuit in the off state. In the on state, the FET behaves like a low resistance, and the inductor in parallel with it has little effect. If you look at the shunt-shunt switch below you can see rectangular spiral inductors in parallel with each shunt FET (lower left and lower right), these are there to compensate for FET off capacitance.
Floating a switch above ground for positive control voltages
The photos of the two SPDT switches above reveal another technique that is often applied to MMIC switch design. The shunt FETs are RF grounded by capacitors that act as RF short circuits in the intended band. A control signal "VDD" is used to bias the FETs at +5 volts or so. Then the control signals have logic levels of 0 and +5 volts. At 0 volts, VGS is -5 volts (FETs are pinched off), and at +5 volts, VGS=0 volts and the FETs are turned on. You'll also notice blocking capacitors at each RF input/output, they are needed so that connections to other components won't accidentally ground the RF lines.
What are the downsides to this technique? You will give up bandwidth at the low end, where the capacitors don't act as short circuits (so you can no longer boast a "DC to 12 GHz" switch, it will be more like a "1-12 GHz" switch). Also, if you are not careful when you sequence the bias voltage to the switch after the logic is already on in the +5 volt state, you may blow the switch because the VGS voltage will be positive in that case, which is a forbidden condition!
Here's another tip about circuit design... see the 3 pF caps that act as blocking caps on the RF inputs? They are in each case followed by a really skinny high-impedance line? This line is used to compensate for the series capacitors reactances, to achieve close to a "short circuit" as possible in the frequency band, so that the VSWR of the switch is unaffected by the caps!