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The first step in making a FET or other semiconductor is to grow a mono-crystalline ingot of pure GaAs, known as a boule. The most popular method of growing GaAs is known as LEC, which stands for liquid encapsulated Czochralski. Check out our Microwave Hall of Fame where you will find Polish-born Jan Czochralski, who invented this process. A second method that is gaining popularity is vertical freeze gradient (VGF), which is not described here.
Before we talk about growing crystals, here are some important definitions pertaining to crystallinity:
Amorphous means no recognizable long-range order to the positioning of atoms within the material (example: glass)
Polycrystalline is the intermediate case, where crystalline subsections exist that are disjointed relative to each other.
Crystalline or monocrystalline means that atoms are arranged in an orderly three-dimensional array (example: diamond). This is the goal for all semiconductors.
LEC-grown GaAs starts out in the in a molten pool of (guess what?) gallium and arsenide in equal atomic proportions. The "melt" is heated in a crucible to a temperature beyond 1238 degrees Celsius to liquefy it. A seed crystal of solid GaAs is orientated vertically above the melt to a particular lattice direction (for example 100, 110, or 111, if you remember the college material science class you slept through.) It is then carefully is dipped into the melt, then pulled from the mix at a controlled vertical rate (very slowly) with a slow spinning motion. The interface of solid and liquid GaAs has to be controlled to the precise temperature at which the two both phases coexist. As the seed is pulled from the melt the crystal grows and its diameter expands until eventually a sausage-like chunk of GaAs starts to take shape. The pull rate is what controls the boule diameter; six-inch boules are pulled slower than four-inch boules. The bigger the diameter the more imperfections (dislocations in the crystal lattice) generally occur. Pull rates are on the order of five millimeters per hour, so a 175 mm boule will take 35 hours to finish. The final product has a clearly identifiable seed and tail end; the seed end is the one with the navel. Finished boules of GaAs often undergo a series of heat treatments to anneal out residual imperfections in the crystal, but this process stays well below the 1238 degree melting point. Below is a picture of some six-inch diameter GaAs boules we "borrowed" off the web.
The diameter of the boule determines wafer diameter. As of 2005, here are the diameters for start-of-the-art boules:
Silicon: 12 inches (300 mm), 8 inches is typical)
InP: 4inches (100 mm)
GaAs: 6 inches (150 mm)
SiC: 3 inches (75 um)
Sapphire: 3 inches (75 mm)
After the boule is annealed it is sliced, generally 25 mils thick for GaAs, thinner for InP, SiC or sapphire because they are more expensive materials. Wafers can be sliced by sawing (picture a really expensive radial arm saw), wire-sawing or even laser. Some factories have saws with 100 parallel blades for dicing boules in one operation, kind of like that cheese slicing thingy you thanked Santa for last winter.
Before the slices are shipped to a FET or MMIC foundry they are polished to a mirror finish, and the crystal directions are defined by cleaving two “flats†onto the wafers 90 degrees apart as shown below. For identification purposes the flats are slightly different depths, one is called the major flat and the other is called the minor flat. Why do we care which way the crystal lattice is configured? One very good reason is that GaAs etches quite differently in the two directions that are exposed. Etching in one direction produces side walls that are undercut, while etching in the other direction produces the opposite taper in the sidewalls. All wafers are marked with boule and slice identification numbers for traceability.
You want to buy some semi-insulating GaAs wafers? Check out M/A-COM, they grow a lot of GaAs material.
GaAs bulk resistivity can be tailored over a huge range, perhaps from 10-6 to 1022, so that GaAs can be considered anywhere from a conductor to an insulator (click here for more info on conductors and resistors). Carbon and oxygen are the main impurities that exist in GaAs, which contribute to low bulk resistivity if they are not counteracted. By doping the LEC melt material with chrome the resistivity can be raised so that MMIC transmission lines will have low dielectric losses, but this trick has its limitations (it does not stay stable through wafer processing steps). Typical high purity, high quality LEC GaAs wafers run around 108 ohm-cm.