There's a coplanar waveguide calculator on our calculator page!
Here's a clickable index to our material on CPW:
Flip-chip technology (separate page)
Coplanar waveguide was invented by Cheng P. Wen, check out his picture in our Microwave Hall of Fame! It was invented when Wen was at RCA's Sarnoff Laboratories in New Jersey, way back in 1969, just two years after the Summer of Love... Dr. Wen now lives in Beijing, and continues to pass on his considerable knowledge to microwave engineering students, and he has corresponded with Microwaves101 on the topic of CPW (how's that for name dropping?)
C.P. Wen explains that his original name for coplanar waveguide was "planar strip line". A co-worker, Lou Napoli suggested the name coplanar waveguide. Thus with Lou's suggestion, CPW invented CPW!
"Classic" coplanar waveguide (CPW) is formed from a conductor separated from a pair of groundplanes, all on the same plane, atop a dielectric medium. In the ideal case, the thickness of the dielectric is infinite; in practice, it is thick enough so that EM fields die out before they get out of the substrate.
A variant of coplanar waveguide is formed when a ground plane is provided on the opposite side of the dielectric, which is called finite ground-plane coplanar waveguide (FGCPW), or more simply, grounded coplanar waveguide (GCPW).
The advantages of coplanar waveguide are that active devices can be mounted on top of the circuit, like on microstrip. More importantly, it can provide extremely high frequency response (100 GHz or more) since connecting to CPW does not entail any parasitic discontinuities in the ground plane. One disadvantage is potentially lousy heat dissipation (this depends on the thickness of the dielectric and whether it makes contact to a heat sink). However, the main reason that CPW is not used is that there is a general lack of understanding of how to employ it within the microwave design community. I don't want to scare you away from CPW, but a lot of CAD programs don't support it. This will change in the years to come as more millimeter-wave work will demand the benefits of CPW.
We don't have equations for characteristic impedance of CPW lines (yet). Neither does Microwave Engineering by Pozar. If you want to get involved in CPW technology, a great reference book is Coplanar Waveguide Circuits, Components and Systems, by Simons. You'll find these books and more on our recommended book page.
For a given line impedance, there is an infinite number of solutions for the geometry of a CPW line. You can make a fifty ohm line 10 microns wide, or 50 microns wide, by adjusting the gap dimension. In practice, you'll tradeoff between size of the circuitry and the line loss; skinny lines can become quite lossy.
Here's a rule of thumb for CPW: the effective dielectric constant for "classic" CPW is very close to the average of the dielectric constant of the substrate (because the filling factor is 50%), and that of free space. If you are using GaAs, Er=12.9, the effective dielectric constant would be (12.9+1)/2=6.95. One way to think about this is that half of the electric field lines are in free space, and half are in the dielectric.
In terms of circuit isolation, you can get great isolation using CPW, because there are always RF grounds between traces. Many examples of high-isolation RF switches have used grounded CPW to get 60 dB isolation or more.
The advantage of having a thick substrate is realized when you fabricate CPW MMICs. The expense of backside processing (thinning, via etch, backside plating) is eliminated. Many companies that are currently developing GaN devices are employing CPW so they can concentrate on device technology and not have to figure out how to etch vias in silicon carbide or sapphire. With GaN technology, wafer slices are on the order of 12 mils thick, so for X-band devices, the height of the chip is well matched to 10 or 15 mil alumina.
For GaAs MMICs, wafer slices start out at 25 mils. If a CPW chip is mounted face-up, a severe height discontinuity can result. The way to get around this problem is to use flip-chip technology, which is an advantage or a disadvantage depending on who you talk to!
The ground inductance for shunt elements is quite low for CPW, compared to microstrip applications. This is because the RF ground is "right there", and you don't have to drill a via hole to connect to it (vias add inductance).
As mentioned preciously, if you want to make compact circuits using narrow transmission lines, you must trade off RF loss. CPW circuits can be lossier than comparable microstrip circuits, if you need a compact layout.
In terms of circuit size, CPW is at a disadvantage versus a stripline of microstrip circuit, because it's effective dielectric constant is lower (half of the fields are in air).
Ground straps are always needed to tie the two grounds together in CPW, or weird things can happen. These are especially important around any discontinuity, such as a tee junction.
Unintended spurious transmission modes can also happen. In a parallel-plate mode, the substrate acts like a dielectric-filled waveguide, and EM energy propagates along unintended paths. Don't get us wrong, if you know how to avoid this pitfall, CPW works great!
More to come!
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