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New for January 2011! Shared inductance greatly affects isolation of shunt-style switches, and to a lesser extent, the insertion loss in multi-throw switches using shunt elements. The effect is made worse with frequency: sloppy layouts can meet your requirements at X-band, but as the microwave industry moves into millimeterwave, this is a make-or-break problem. The point that will be revealed here is obvious once you understand it, but it is often overlooked, particularly by inexperienced students and researchers exploring a new technology. This statement will be verified by posting some recent images from IEEE papers...
This is something that applies to PIN diode switches (dating back to the 1960s!) as well as MEMS switches, CMOS switches, even GaN HEMT switches. If you understand this simple concept and your colleagues don't, you will soon become revered as a microwave switch genius. For the good of your own career, it's best to keep this secret to yourself, but for the good of mankind, we're going to post it here.
The entire concept is illustrated in the following image. One the left, a PIN diode is inserted into a transmission line the "hard way", where a single wire is strapped over it, then pinned down on top of the diode. Although this is the hard way to do it from an assembler's point of view, this is the correct way.
The image on the right, the shunt diode is moved off to the side of the transmission line, and connected with a single wire. This is the easy way for assembly, but the electrically wrong way to do this. Why?
It's true that the DC schematic of the two images is identical, but what web site are you visiting? This is a microwave problem!
The schematics below correspond to the two ways of connecting the PIN diode, with 0.05 nH of wire bond inductance (which is pretty sporty!) The upper schematic represents the wrong way, here, the wirebond inductance is fully in series with the PIN diode (shared between the input and output ports). The diode we have approximated as 5 ohms in its on state. In the second schematic, the better way, wirebond inductance is split into two components, both are 0.05 nH. In this way the diode is said to be integrated into the transmission line. Remember those words, "integrated into the transmission line", and associate them with "good switch". You are getting very sleepy...
The responses of the two circuits are shown below, isolations on the top, and reflection coefficients below. At DC, they start out at the same value, but as frequency is increased, isolation suffers mightily for the red trace (the wrong way). The reflection coefficient in a shunt switch you want to be as large as possible (ideally 1.0). In the wrong method, the reduced reflection coefficient will mess up the insertion loss of the opposing arm an a SPDT switch.
Note that the above analysis is simplistic, you will always encounter some shared shunt inductance, a result from how the structure is grounded (via hole inductance and airbridge inductance for examples). Just don't make it worse than it has to be!
Example 1: GaN HEMT, EuMIC 2008
Below is a switch presented at EuMIC 2008, High Power Microstrip GaN-HEMT Switches forMicrowave Applications. It is a 2-18 GHz GaN HEMT effort, SPDT, with series/shunt/shunt configuration. Now that you know the secret, it is easy to spot a design where the designer doesn't! The shunt FETs have not been integrated into the transmission line, and the isolation suffers as frequency is increased.
Example 2: NTU, 2004 GaAs
National Taiwan University has produced some of the best IEEE papers in the past decade. Regarding the future of microwave engineering, it has become clear that much of the innovative work will come out of Asia What the heck happened here in the United States? A subject for another day, Mr. Dorfman. However, sometimes the best students fail to understand the simple concept of how to integrate a shunt device.
This came from a paper titled Compact W-band SPQT MMIC Switch UsingTraveling Wave Concept. This switch was designed for W-band. Note that "SPQT" means "quadra-throw", we'd have called it SP4T if it was ours.... Note that the three shunt FETs in each arm are NOT integrated into the transmission lines.
Example 3: NTU 2005, CMOS
Here's a CMOS effort from NTU, circa 2005: A Millimeter-Wave Wideband SPDT Switchwith Traveling-Wave Concept Using 0.13-µm CMOS Process. Again, the designers clearly didn't understand how to integrate shunt FETs.
This detail was offered in the paper. But to fully understand how to apply the trick, you have to consider the three-dimensional nature of RFICs on CMOS.
Example 4: NTU, 2005, GaAs CPW
This team really knows their stuff, DC-to-135 GHz SPST and 15-to-135 GHz SPDT Traveling Wave Switches Using FET-Integrated CPW Line Structure, is a perfect example of integrating the shunt device with a transmission line. The structure is realized in coplanar waveguide, which helps minimize the unavoidable inductance of shunt elements. An A+ example!
Here the author offers a figure that illustrates the thought process of integrating a shunt device into a CPW transmission line. Hire this guy, he gets it! Except for one potential problem... a nuance as best, but the best designers use all the nuances they can get. Tell you what, the first person to correctly identify the issue in (c) will receive a check for fifty bucks from Microwaves101.com! As of February 3, many have tried, but no one has claimed the check! Here's a hint, it has to do with the position of the airbridge...
Update March 2011: Here's the answer to how this switch could be improved. No one figured it out, so we are sorry, we didn't pay out the prize money! Hey, there's something wrong here, you should be paying us for the advice... welcome to the irony of the world wide web.
The switch FET they are using is nicely integrated with the transmission line. It requires an airbridge to connect the two gate fingers. They need to pay attention to which side the airbridge is on, it makes a difference, albeit a small one.
In a shunt switch, the insertion loss is related to the reflection coefficient of the off arm. In this case, we want to maximize it, we want full reflection, as close to a short circuit as possible. Then when the quarterwave section is added in front of it, it won't load down the line, because it will be as close to an open circuit as possible. Here's the deal... the side with the airbridge doesn't have as high a reflection coefficient, so it should be placed opposite the common port. In the NTU circuit, the airbridge is on the wrong side.
The effect can be illustrated with an equivalent circuit model, shown below. Here we have a symmetrical device in the on state, with perhaps 200um periphery (two 100um fingers). On the left port we have configured a 5 pH inductor to represent the airbridge. We have added transmission lines to account for the distributed property of the switch FET (at 100 GHz, trust us, it ain't no lumped element!).
Below the reflection coefficients are plotted. The left side is not as good as the right side.
Finally, the return losses are plotted below. The difference is small (just 0.3 dB or so).
Now you must refer to the chart on this page, for off-arm loading. The net effect is that that placing the airbridge on the wrong side cost the design 0.1 dB in insertion loss. That might not sound like a lot, but switch bragging rights are at stake and every tenth of a dB counts! We're talking free "centi-Bels" here. In practice, the effect may be much worse, as there is radiation loss at the airbridge which our simple equivalent circuit does not take into account. Now say this out loud: For a shunt switch FET that is neatly integrated into a transmission line like this one, always place the drain-over-source airbridge opposite the common port. It doesn't cost extra to do it right.
So, who's your Daddy when it comes to switch design? That's right, he is. Send us a fat check when you use this knowledge at your next design review!
Example 5: Teledyne, 2008, GaN HEMT
High Power AlGaN/GaN Ku-Band MMIC SPDT Switch and Design Consideration.
Not only did they not integrate the shunt FETs, they violated another rule for high isolation. Let's define a rule of thumb here: For highest isolation in a SPDT or SP3T, the outputs should exit the switch orthogonal to each other.
Microwaves101 Rule of Thumb
In the example, the two outputs are parallel to each other, and are closely spaced. If such a switch was used in a real layout, the isolation that is provided on-chip will be murdered by the parallel wirebonds and transmission lines going off the chip!
We should probably cut these guys some slack. This is a new process, and the switch is likely more of a test structure than a potential product. One reason that the arms are pointed east could be to facilitate RF probing the structure, probing at right angles is tricky!