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EM analysis in MMIC design

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New for March 2017!  EM is a necessary step in completing a MMIC design.  Good MMIC designers have their own techniques for finalizing designs using a combination of linear analysis, optimization and EM analysis.  When was the last time a MMIC designer explained her/his secrets? 

Not that long ago, EM analysis was separate from optimization.  EM is universally looked upon as the "truth" in a circuit file, while linear models are merely alternative facts. Organization is critically important to the design flow.  Here is a typical methodology for introducing EM into a MMIC design, and ironing out the layout effects:

  1. Develop a circuit model for your design using linear analysis.  Try to build off of an existing design in order to save time synthesizing everything.
  2. Optimize  the circuit model to the best response that hopefully exceeds all requirements. Save this analysis for reference.
  3. Generate a circuit layout from the linear model.  For extra credit, use a foundry design kit and get the layout to pass design rule checking (DRC).
  4. Using an EM tool, EM chunks of the layout into SNP files. This requires some judgement as to proximity effects.
  5. Feed the EM SNP files back into the linear model and examine the response to see if overall design needs work (it certainly will, after the first EM analysis).
  6. Add some short lines here and there between the EMed parts, called "tweaks".
  7. Optimize the tweak lengths (widths stay the same as the lines they connect to).
  8. Go back into EM and add (or subtract, as the lengths can be negative) the tweaks to the EM layout, and re-EM all chunks.
  9. Place the new EM results into the linear file with the tweaks zeroed out, and examine response.
  10. Repeat steps 6 through 9 as required.  Expect to do this at least three times before you give up and allow the circuit to be slightly lower in performance compared to step 2.

With modern design tools, you can now parameterize layouts within the EM tool, feed the parameters hierarchically to the top-level design file, and use the circuit optimizer to optimize the response.  The downside is that you will experience an order of magnitude increase in CPU time, but computers are cheap and fast, and you can fiddle with your mobile device for a few hours or cut the lawn if you work from home.  You realize where this is all going... in the future, a computer could do the entire design, so you might be looking for a career change in 10 or 20 years.

In the video below,  Jack Sifri, MMIC Design Flow Specialist, covers a practical and effective methodology to account for coupling effects in RF design and how to optimize the performance of an RF layout by parameterizing it and performing EM optimization prior to going to fabrication – thus helping to achieve first pass success. By watching this 14-minute video you will learn how to:

  • Parameterize your design
  • Perform EM optimization on your design
  • Make your EM optimization process fast and efficient

Jack Sifri explains EM optimization in MMIC design

Port modeling

Many hours of EM analysis can be wasted if your RF ports are creating hidden problems. Similar to network analyzer calibration, port calibration in EM Analysis de-embeds parasitics associated with launching energy into your device-under-test (DUT).

Here's a video, this time from Keysight's EM Applications Specialist Hee-Soo Lee. Here you will learn that port calibration methods are specially designed to better match EM ports with circuit components when performing a complete circuit simulation. In this video, Hee-Soo reviews five different Momentum (method of moments) calibration methods.  Then he shows how port calibration methods impact simulation results, along with where and how to use them properly.

 Hee-Soo Lee explains EM port calibration

 

Author : Unknown Editor

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