Click here to go to our main page on phase shifters
Go to our download page and get a copy of the MWO file that was used to generate content for this page.
New for March 2024. This is the seventh installment of an article on designing a four-bit phase shifter.
Click here to go to the first installment of a four-bit phase shifter design in MWO
Click here for the second installment of this article on phase shifter design, where we correct the RMS phase error calculation.
Click here for the third installment, where we design a MMIC 22-degree bit
Click here to go to the fourth installment, where we design a MMIC 45-degree bit
Click here to go to the fifth installment, where we design a MMIC 90-degree bit
Click here to go to the sixth installment, where we design a MMIC SPDT switch used in a MMIC 180-degree bit
Click here to go to the eighth installment, where we complete the four-bit MMIC phase shifter preliminary design
This 180-degree bit design uses back-to-back SPDT switches with low-pass and high-pass filters. The switch design is described here.
The 180-degree bit LPF uses spiral inductors and a single-layer metal-insulator/metal (MIM) capacitor of ~250 fempto-Farads, as shown in the schematic below. The sheet capacitance is 0.0003 pF/mm^2, typical of GaAs processes.
Here is the layout of the 180-degree bit LPF. It is not as compact as the boss would like it, but it is a good start.
Here is the 180-degree bit HPF, it uses two ~350 fempto-Farad caps and a long, folded line to act as an inductor.
Here is the layout of the 180-degree bit HPF.
Below, we plotted the 180-degree bit's two filters over wide band so you can see their low-pass and high-pass characteristics. The amplitude of this design will have a pretty bad roll-off outside of 9 to 11 GHz but it maintains phase quite well.
Here is the 180-degree bit test schematic, with the two states configured between four ports.
Nest up we have the 180-degree bit top-level schematic. It includes the two SPDT switches, the HPF and LPF, and a small section of line we added to help out the overall four-bit layout.
Here are the magnitudes of the two states. The loss of two switches adds up to ~1 dB. The impedance match is pretty good in the center but one state has a narrow response.
Here is the optimized phase response. It is flatter than the 90-degree bit response, owing to the use of the switched lumped-element architecture. We could go back and redesign the 90-degree bit the same way to improve its response, but it would increase the size of the phase shifter layout and smaller is always better from a business point of view.
Click here to go to the final(?) page of this lesson where we cascade the four-bit MMIC phase shifter!