# Multi-bit phase shifter design using Microwave Office

Click here to go to our main page on phase shifters

Click here to see a previous multi-bit phase shifter simulation effort using ADS, written a while back

This page is part of a tutorial on a four-bit phase shifter design, here are links to the ther pages:

Click here for the second installment of this article on phase shifter design, where we correct the RMS phase error calculation.

Click here for the third installment, where we design a MMIC 22-degree bit

Click here to go to the fourth installment, where we design a MMIC 45-degree bit

Click here to go to the fifth installment, where we design a MMIC 90-degree bit

Click here to go to the sixth installment, where we design a MMIC SPDT switch used in a MMIC 180-degree bit

Click here to go to the seventh installment, where we design a MMIC 180-degree bit

Click here to go to the eighth installment, where we complete the four-bit MMIC phase shifter preliminary design

Go to our download page and get a copy of the MWO files that were used to generate content for this page.

**New for October 2023**. If you are looking for advice on how to design a phase shifter, either a MMIC or a hybrid integrated circuit, you have come to the right place. Everybody has to be good at something, even it is taking out the kitchen trash.

It's been some time since we had a working copy of ADS, hence we have no way to update our pages on phase shifter design using that tool. Now we'll show you how to analyze (and soon design) a multi-bit phase shifter using Microwave Office and provide the design file as a free download. For now we are going to stick with ideal switches and ideal lumped element filters to demonstrate the design technique. With some class participation, hopefully we can keep working on the design file until it has actual MMIC-compatible phase bits.

## "AWR" or "MWO"?

We sometimes refer to AWR's Design Environment as "Microwave Office" on this site. That was the original name of the design tool. Cadence (the owner of AWR and hence owner of MWO) ,mostly refers to it as AWR, but if you look at the comfigurations they have names like "MWO-106", so they have not completely stomped out the original name. We were designing phase shifters when some of you were watching Power Rangers, so we will call it anything we want unless they sponser us, then we will do whatever they demand...

## Switch FET "two-state" model

For the phase shifter design we are developing we are using a simple model you can find here. It takes into account the physical size of the device, and the switching figure of merit is used as an independent variable.

For now we will assume our audience is more interested in designing a MMIC phase shifter, so we will talk about switch FETs. The design file we are discussiing here does not actually contain any switch-FET models, but this is where all MMIC control circuit design starts. The heart of phase shifter is the switching device. You may be tempted to call it an "active" device, but active implies that energy is added to the system through the device. Switch FETs and PIN diodes are considered passive.

Foundries spend a lot of effort creating accurate models of active devices, and often fall down on the job when it comes to the lowly switch FET. Foundry models are based on specific FET layouts. For the best design, you need to design your own FETs. You will have to observe the cardinal rule that all FET fingers point in the same direction, and the foundry will try to force a minimum gate-to-gate spacing. G-G spacing may be driven by rules about current density for power FETs. Spacing out the gates on a switch FET is a sure way to kill off high-frequency response. Be prepared to battle the design rules!

Here's a Microwaves101 model of the intrinsic part of a switch FET. But that model will only get you so far... you need to consider the distributed properties of the FET layout... you can pretend it is a mix of small transmission lines. But to be first-pass successful, you will need to model the switch FET using an EM simulator, in both on and off states. We started to describe that on this page but fell down on the job.

## Phase bit design

Any multi-bit phase shifter design starts with individual bits, designed independently. Here is a schematic of the example 22 bit. It combines a low-pass and high-pass filter to acheive the required phase shift, you can grab the Excel spreadsheet that calculated the lumped element values on our download area. It has two variables that it passes upward: "state" and "bit". State trips the switches to control the phase state. When State=1, the bit is in its "longest" phase state (most negative S21 angle). "Bit" is used in a multi-bit design to sequentially throw all of the states.

The bits we threw together for this discussion contain ideal filters, but we added some lossy, 55 ohm/500um long transmission line sections on each port to depart from perfection. You can't see the data on the schematic, but we used Eeff of 7 and attenuation at 10 GHz of 200 dB/meter (these are applied as Global Definitions). The other four bits are exactly the same schematic but the values of C!, L1, C2 and L2 are different to achieve the required phase shirts at center frequency. We chose 10 GHz as teh design center. Here are the LC values for the four bits.

Low pass | Low pass | High pass | High pass | |

Bit | L1 | C1 | L2 | C2 |

22 | 4.079 | 3.232 | 0.078 | 0.062 |

45 | 2.079 | 1.600 | 0.158 | 0.122 |

90 | 1.125 | 0.768 | 0.330 | 0.225 |

180 | 0.796 | 0.318 | 0.796 | 0.318 |

It's funny how the 180 bit L and C values are the same for low pass and high pass...

Each bit design is placed twice into what we call "Bit Test XX" schematic, where XX is the bit target phase., as seen below. Ports 1and 2 (S21) contain the phase state, and ports 3 and 4 contain the eference state. Always be consistent with the states in the four bit-test circuits.

Next we have to do a little math in the equation block. Here we subtract the phases of the two states to arrive at the phase shift for each bit. The way we define the states, phase shift is negative number. The 180 bit will give you some trouble, sometimes it will go back and forth between -180 and +180 degree, so we duct-taped an IF statement onto the equations to satisfy the problem for now. This problem will only get worse when we start optimizing bits that are way off in phase, as opposed to the ideal bits we are looking at here. Note that MWO assumes S-parameter phases are in radians (wht the heck?) so you have to convert them with the "deg" function.

A pair of plots is made for each phase bit, one for magnitude and one for phase. Let's start with the magnitudes. We only plotted the reflection coefficient on Port 1/Port 3, because of symmetry. In a real design you will need to look at both ports.

Here is the 22 bit, it has very wideband performance. One thing you will learn is that the bigger the phase bit, the narrower the band.

Here are the 45-bit magnitudes. The bandwidth is less but still very nice.

Here's the 90-bit plot It is not winning any beauty contests.

Here's the 180-bit. Its bandwidth is downright shameful. In practice there are ways to improve it, but we won't get into that here.

Now let's look at phase states. Here is the 22 bit. Sweet!

Notice how we use increments of 22.5 degrees on the Y axis. That is equal to the least significant bit. Always think about what the best axes are for your engineering plots. Never let the stoopid software auto-scale itself, you lazy b#$@%rd.

Here is the 45. Also impressive.

Now the 90 bit. It is not great. And in practice, the 9-degree bit will probably give you the most trouble.

Here's the 180 bit. We knew it was going to be bad news for bandwidth, and it is.

If we consider that our design need only cover 9 to 11 GHz, maybe we are going to be able to design something useful.

## Four-bit design

Once we have our bit designs fuctional, it is time to cascade them together into a multi-bit design. In this example we have four bits. Put them in any order you like; the best order may be layout driven. Forget about doing any phase or amplitude optimization in a multi-bit simulation, it is likely a waste of time.

We ordered the bits from least to most phase, left to right. You could call this the "canonical" order, as it appears to follow some sort of rule. If your boss is religious, he/she will think canonical means doing the Lord's work. Between us designers, we are more interested in the Devil in the details.

Notice that the 22 bit instance has "bit=0" and 180 bit has "bit=3". When state is swept from 0 to 15, the bits will follow a binary sequence, shown in the following table.

State |
Bit 0 (22 bit) |
Bit 1 (45 bit) |
Bit 2 (90 bit) |
Bit 3 (180 bit) |
Phase state (degrees) |

0 |
0 |
0 |
0 |
0 |
0 |

1 |
1 |
0 |
0 |
0 |
22.5 |

2 |
0 |
1 |
0 |
0 |
45 |

3 |
1 |
1 |
0 |
0 |
67.5 |

4 |
0 |
0 |
1 |
0 |
90 |

5 |
1 |
0 |
1 |
0 |
112.5 |

6 |
0 |
1 |
1 |
0 |
135 |

7 |
1 |
1 |
1 |
0 |
167.5 |

8 |
0 |
0 |
0 |
1 |
180 |

9 |
1 |
0 |
0 |
1 |
202.5 |

10 |
0 |
1 |
0 |
1 |
225 |

11 |
1 |
1 |
0 |
1 |
247.5 |

12 |
0 |
0 |
1 |
1 |
270 |

13 |
1 |
0 |
1 |
1 |
292.5 |

14 |
0 |
1 |
1 |
1 |
315 |

15 |
1 |
1 |
1 |
1 |
337.5 |

Now let's look at some multi-bit performance. We'll decrease the X axis to just show 8 to 12 GHz, as we know the bandwidth is limited. Here are the input and outpur return losses. Your goal should be 15 dB, but in practice you might have to accept 10 dB in some states.

Let's look at insertion loss. In this example you see less than 1 dB loss, due to the lossy sections of line we added to the bits (ideal L-C networks would have zero loss). In a real MMIC design you may struggle to hit 3 dB loss. In a hold-my-beer moment you might get close to 1dB loss, which seems like it would have broad application, but it is hard to find a customer that wants to look at passive ESAs these days.

Let's plot the phase states. Looks like they are pretty close to 22.5 degrees apart, which is what we are after. However, this is not a good way to display the data.

Microwave Office has some built-in features for evaluating phase shifter circuits. You can directly plot phase states using "PhsShift", for example. This is a much better way to see how your design is doing. Note that MWO plots phase shift as positive numbers, when we defined it as negative numbers. Don't get hung up on this, we tend to plot phase shift as negative for individual bits,and positive for the multi-bit circuit. Think of the multi-bit plot as the absolute value of the phase states.

Here is the average loss that Microwave Office calculated from its built-in function "Mag Mean". A nice short cut.

Here is the RMS amplitude error, another built-in function.

Here are the four-bit phase errors, as calculated by Microwave Office. Notice that they are all positive errors. The networks we used only exceed the nominal phase shift when you move away from center frequency. You can tell from the groupings where the 90 and 180 bits kick in, phase errors are greatly expanded at band edges. You will notice there is one flat line with zero error. That is the reference state. Microwave Office treats it as if it has no phase error. **Not only is that incorrect, it sells your design short!**

The true "reference state" of a phase shifter is the average of all of the phase states, including the reference state. In our next installment on the design example, we will correct the phase error equation. You will see that the phase errors are a mix of positive and negative values.

Microwave Office also calculates RMS phase error, but it is also done incorrectly and is pessimistic. It "RMS's" N-1 phase states compared to the reference state (fifteen states when we know thare are sixteen in this example). We will also fix that equation for you in the future.

That's all for now, more to come soon! First, we will fix the phase error calculations, then we will design an actual MMIC phase bit, starting with the 22 degree bit. It won't be foundry-ready, but it will give you an idea of how to proceed. Send us feedback if you have any specific questions or comments.

Click here for the next installment of this article on phase shifter design, where we correct the RMS phase error calculation.

**Author : **Unknown Editor