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New for March 2024. This is the sixth installment of an article on designing a four-bit phase shifter.
Click here to go to the first installment of a four-bit phase shifter design in MWO
Click here for the second installment of this article on phase shifter design, where we correct the RMS phase error calculation.
Click here for the third installment, where we design a MMIC 22-degree bit
Click here to go to the fourth installment, where we design a MMIC 45-degree bit
Click here to go to the fifth installment, where we design a MMIC 90-degree bit
Click here to go to the seventh installment, where we design a MMIC 180-degree bit
Click here to go to the eighth installment, where we complete the four-bit MMIC phase shifter preliminary design
This switch was designed specifically for a 180-degree phase shifter bit, no one in their right mind would consider it as a stand-alone product. Key characteristics are low loss, good impedance match at 10 GHz, and 10 dB isolation. Why 10 dB? Two of them back-to-back will provide 20 dB, which should be enough to prevent the two filters from leaking into each other in significant way. We chose a series switch topology which should work well with our cheesy FET model. A series/shunt switch would have way better isolation but the added complexity would decrease the accuracy of simulated performance unless we spent some time EM modeling the FETs
The switch employs a shunt inductor to counter-act the capacitance of the FETs. It makes for a nice resonance at 10 GHz. The schematic is shown below.
Below is the layout. Common port is on the left, the switched ports are on the right. Two of the rectangles represent footprints of series FETs. The switch is asymmetrical, which was done to help the 180-degree bit layout as you will see in the next lesson. There is a dog-leg at the common port on the left, it is needed for the four-bit phase shifter layout.
Here is the predicted performance. Loss is ~1 dB and isolation around 10 dB.
Click here to proceed to the next lesson: the 180-degree MMIC bit.