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Capacitor voltage effects

Click here to go to our main page on capacitors

Click here to go to out page on capacitor temperature variation

New for January 2019!  This page was suggested by Hadrien, who has had recent experience in MLC capacitor variations with voltage.  Did you know your capacitor nominal value can drop 80% when you apply a DC voltage to it?  Worse, there does not seem to be any standards for voltage variations like there are for temperature variations.

This page is primarily discussing MLCCs, or multi-layer cerami capacitors, in Class 2.  Class 2 uses exotic dielectrics such as barium titanate (BaTiO) with some other strange additives in order to get high dielectric constant in the thousande (to increase capaitance density).  Barium titanate is a ferro-electric material, which is the source of voltage/capacitance misery.

From here down,  thanks to Hadrien!  

MLCC voltage dependance

Suppose we want to redesign the good old MW101 breadboard RF pulsed source (2006) with more recent components (this page was written in 2019). Let’s start by the capacitor. Today the trend is to use MLCC ceramic capacitors, and in the future we might have solid polymer capacitors.

Let’s start by a simple search and replace of the old 4.7 µF capacitor:

https://fr.rs-online.com/web/p/condensateurs-ceramique-multicouche/8467296/ (4.7 µF)

Seems rather nice, and smaller than the original. Wrong! Let’s check the detailed characteristics:

https://psearch.en.murata.com/capacitor/product/GRM188R61A475KE15%23.html

   

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Not good! If we need the 4.7 µF capacitance value, we’ll be soon in trouble.

Let’s search a bigger capacitor. We search the biggest value among MLCC capacitors having 10 V rating.  

https://fr.rs-online.com/web/c/passifs/condensateurs/condensateurs-ceramique-multicouche/?applied-dimensions=4294244793,4291386526&pn=1

We find some nice puppies:

 

 


Let’s investigate the details:

https://fr.rs-online.com/web/p/condensateurs-ceramique-multicouche/8851960/

https://psearch.en.murata.com/capacitor/product/GRM32ER61A107ME20%23.html#

   

Rather low for a 100 µF capacitor. But 9x more than the 4.7 µF used in the previous version of the pulsed source.

 

https://fr.rs-online.com/web/p/condensateurs-ceramique-multicouche/1084055/

https://product.tdk.com/en/search/capacitor/ceramic/mlcc/info?part_no=C3216X5R1A107M160AC

Rather low for a 100 µF capacitor. Not as much as the GRM model but still 6x more than the original 4.7 µF.

 

https://fr.rs-online.com/web/p/condensateurs-ceramique-multicouche/8410809/

http://ksim.kemet.com/Plots/SpicePlots.aspx

… 33.6 µF. Rather low for a 100 µF capacitor. But again 7x more than the original 4.7 µF.

 

In conclusion, our 100 µF capacitors have when biased at 5 V a capacitance value much lower. This lower value is still sufficient for our application because we oversized the capacitor, but in designs where the capacitors are undersized this can lead to huge problems. Note that such problems are pretty hard to debug if not aware because the cap meters instruments always measure at 0 V.

An other interesting point is what happens when we combine both biasing and temperature effects. Let’s see an other curve provided by TDK:

Note than the temperature dependence is actually quite good when biased. Had we told you that temperature coefficient is not as much problematic as voltage coefficient?

 

Refs :

https://www.maximintegrated.com/en/app-notes/index.mvp/id/5527

 

 

Author : Hadrien Theveneau

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